1. Technical Field
The subject matter described herein relates to systems, apparatuses, and methods for distributed virtual-ground switching for successive-approximation-register (SAR) and pipelined analog-to-digital converters (ADCs).
2. Background Art
Communication technologies, such as networking, broadband, and wireless communications, often utilize switched capacitor circuits with analog-to-digital converters (ADCs), such as successive-approximation-register (SAR) ADCs and pipelined ADCs. SAR ADCs typically include a signal buffer, an input switch driven by a voltage (e.g., VDD) at the output of the signal buffer, and a number (n=1, 2, 3, . . . ) of signal-driven capacitors with bottom-plate reference switches. One conventional implementation of a SAR ADC uses a thick-oxide metal oxide semiconductor field effect transistor (MOSFET) input switch, with relatively slow performance, at the output of the signal buffer. These MOSFETs have their gate voltages “bootstrapped” (e.g., using a charged capacitor to raise the gate voltage) during the tracking phase to help reduce voltage headroom and linearity issues, but this configuration suffers from several drawbacks. For instance, over-voltage issues persist especially as the manufacturing process scales down toward 16 nm. Smaller scale processes suffer reversed junction leakage and breakdown at drain-to-body voltage Vdb>VDD, and portability suffers due to process dependence and design complexity. In addition to area and power overhead, performance also suffers due to increased parasitics, switching activities, etc. Further, without “bootstrapping,” an additional power supply must be provided at a higher voltage for the thick oxide MOSFET gate (e.g., twice VDD).